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LX1673
TM (R)
High Frequency PWM Regulator
PRODUCTION DATA SHEET
DESCRIPTION
KEY FEATURES
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The LX1673 is a highly integrated power supply controller IC featuring one PWM switching regulator stage with an additional onboard linear regulator driver. With several switching frequencies available (up to 900kHz) the LX1673 can be optimized for both cost and PCB space. Utilizing external compensation, a wide selection of external components can be chosen for use in any application while maintaining stable operation. The LX1673 incorporates a fully programmable soft-start and power sequence capabilities. The LDO and PWM have independent enable pins.
With onboard gate drivers, the switching PWM output is capable of sourcing up to 15A. The LX1673 also features an additional Linear Regulator Controller output, which when coupled with an inexpensive MOSFET is capable of supplying up to an additional 5A for I/O, memory, and other supplies surrounding today's microprocessor designs. Each regulator output voltage is programmed via a simple voltage-divider network. Integrated hiccup mode current limiting is implemented utilizing MOSFET RDS(ON) impedance. This enables the LX1673 to monitor maximum current limit conditions without the use of expensive current sense resistors.
Two Independently Regulated Outputs Outputs As Low As 0.8V Generated From An Internal 1% Reference Integrated High Current MOSFET Drivers 300KHz, 600KHz, and 900KHz High Frequency Operation Minimizes External Component Requirements Soft-Start and Power Sequencing Control Adjustable Linear Regulator Driver Output No current-sense resistors APPLICATIONS/BENEFITS Video Card Power Supplies PC Peripherals Computer Add-On Cards 3.3V Power Conversion DDR Memory Termination
IMPORTANT: For the most current data, consult MICROSEMI's website: http://www.microsemi.com
PRODUCT HIGHLIGHT
+3.3V
+5V
PWRGD
VOUT1 +12V
+3.3V 20 1 LDGD 2 LDFB VOUT2 3 LDDIS 4 DGND 5 AGND DIS 6 LDDIS 7 SS 8 EA+ EA9 CS EAO 10 VS 11 VCCL BDRV 14 13 12 +5V 19 18 17 16 15 +5V
LDVCC PWGD VC1 TDRV PGND
LX1673
VCC
DIS
LX1673 LX1673
TA (C) -40 to 85 -40 to 85 -40 to 85
Copyright (c) 2004 Rev 1.0, 3/18/2005
PACKAGE ORDER INFO Plastic TSSOP Switching PW 20-Pin Frequency (kHz) 300 600 900 LX1673-03CPW LX1673-06CPW LX1673-09CPW
LQ
Plastic MLPQ 20-Pin
RoHS Compliant / Pb-free
RoHS Compliant / Pb-free
LX1673-03CLQ LX1673-06CLQ LX1673-09CLQ
Page 1
Note: Available in Tape & Reel. Append the letters "TR" to the part number. (i.e. LX1673-03CPW-TR)
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
LX1673
TM (R)
High Frequency PWM Regulator
PRODUCTION DATA SHEET
ABSOLUTE MAXIMUM RATINGS
PACKAGE PIN OUT
LDVCC PWGD PGND TDRV
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Supply Voltage (VCC) DC ................................................................-0.3V to 5.5V Supply Voltage (VCC) Transient .........................................................-0.3V to 6V Driver Supply Voltage (VCCL) DC .....................................................-0.3V to 13V Driver Supply Voltage (VCCL) Transient............................................-0.3V to 16V Driver Supply Voltage (VC1) DC .......................................................-0.3V to 19V Input Voltage (SS/DIS) .....................................................................-0.3V to 5.5V Output Drive Peak Current Source (HO, LO).......................................1A (500ns) Output Drive Peak Current Sink (HO, LO) ..........................................1A (500ns) Operating Temperature Range .........................................................-40C to 85C Maximum Operating Junction Temperature ................................................ 150C Storage Temperature Range...........................................................-65C to 150C Lead Temperature (Soldering 180 seconds) ................................................ 235C
Package Peak Temp. for Solder Reflow (40 Seconds Maximum Exposure).. 260C(+0, -5)
Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of specified terminal.
VC1
16 LDGD 1 LDFB LDDIS DGND AGND 6 EA+ EAO EADIS SS BDRV VCCL VCC VS 11 CS
LQ PACKAGE
(Top View) N.C. - No Internal Connection N/U - Not Used RSVD - Do Not Use
The limitation on transient time is thermal and is due to zener diodes on the supply pins, application of maximum voltages will increase current into that pin and increase package power dissipation. THERMAL DATA
PW Plastic TSSOP 20-Pin
THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA
VC1 PGOOD LDOVCC LDGD LDFB LDDIS DGND AGND DIS SS
1
20
10
11
TDRV PGND BDRV VCCL VCC VS CS EAO EAEA+
90C/W
PW PACKAGE
(Top View)
LQ
Plastic MLPQ 20-Pin 35C/W
Pb-free 100% Matte Tin Lead Finish
THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA
Junction Temperature Calculation: TJ = TA + (PD x JC). The JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no airflow.
PACKAGE DATA PACKAGE DATA
Copyright (c) 2004 Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 2
LX1673
TM (R)
High Frequency PWM Regulator
PRODUCTION DATA SHEET
FUNCTIONAL PIN DESCRIPTION NAME EAEAO EA+ VCC VCCL LDFB CS DESCRIPTION Voltage Feedback - Output voltage is connected through a resistor network to this pin for feedback to set the desired output voltage of the switching PWM output. Error Amplifier Output - Sets error amplifier gain and external compensation if used. Voltage Reference - Connect to the SS pin or any other external voltage. Used in conjunction with EA-, and an external resistor divider, to set the desired output voltage for the PWM output. IC supply voltage (nominal 5V). Power supply pin for Low side drivers. Low Dropout Regulator Voltage Feedback - Sets output voltage of external MOSFET via resistor network. Over-Current Limit Set - Connecting a resistor between CS pin and the source of the high-side MOSFET sets the current-limit threshold for the PWM output. A minimum of 1K must be in series with this pin. PWM Soft-start/Hiccup Capacitor Pin - During start-up, the voltage on this pin controls the output voltage of the switching regulator. An internal 20K resistor and the external capacitor set the time constant for soft-start function. The Soft-start function does not initialize until the supply voltage on VCC exceeds the UVLO threshold. When an over-current condition occurs, this capacitor is used for the timing of hiccup mode protection.
Analog ground reference. Digital ground reference. Low Dropout Regulator Gate Drive - Connect to gate of external N-Channel MOSFET for linear regulator function. MOSFET Driver Power Ground. Connects to the source of the bottom N-channel MOSFETS of the switching regulator. High Side MOSFET Gate Driver Low Side MOSFET Gate Driver High-Side MOSFET Gate Driver Supply - Connect to separate supply or boot strap supply to ensure proper highside gate driver supply voltage. LDO Disable Input - High disables LDO output. This pin has a 100K pull down resistor. Voltage reference for Short Circuit Current sense. This pin is also the supply pin for the Current Sense Comparator. This pin cannot be left floating, if current limit is not used connect to VCC. Power Good Output - Open drain output, goes high at end of Soft Start and no Fault. Pulls low if any Fault condition occurs. LDO VCC Supply - Connect to voltage supply greater than supply rail for LDO MOSFET drain. PWM Disable Input -High disables the PWM output. This pin has a 80K pull down resistor.
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SS
AGND DGND LDGD PGND TDRV BDRV VC1 LDDIS VS PWGD LDVCC DIS
PACKAGE DATA PACKAGE DATA
Copyright (c) 2004 Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 3
LX1673
TM (R)
High Frequency PWM Regulator
PRODUCTION DATA SHEET
ELECTRICAL CHARACTERISTICS Unless otherwise specified, the following specifications apply over the operating ambient temperature 0C TA 70C except where otherwise noted and the following test conditions: VCC = 5V, VCCL = 5V, VC1=12V, LDVCC = 12V, TDRV = BDRV = 3000pF Load. Parameter
SWITCHING REGULATORS Input Voltage Operation Current LDO Operating Current Reference Voltage Line Regulation Note 1 Load Regulation Note 1 Dead Time Minimum Pulse Width Maximum Duty Cycle Maximum Duty Cycle Maximum Duty Cycle ERROR AMPLIFIERS Input Offset Voltage DC Open Loop Gain Unity Gain Bandwidth High Output Voltage Low Output Voltage Input Common Mode Voltage Range Input Bias Current CURRENT SENSE Current Sense Bias Current Trip Threshold ISET VTRIP VCS = VVS - 0.3V , VVS = 5V Referenced to VS , VVS = 5V Current into VS pin Static Static CL = 3000pF ISOURCE = 20mA, VCCL = 12V ISINK = 20mA, VCCL = 12V LX1673-03 PWM Switching Frequency Ramp Amplitude FSW VRAMP LX1673-06 LX1673-09 255 510 765 10 45 260 50 300 350 2 2.5 3 50 11 0.15 300 600 900 1.25 0.25 345 690 1035 VPP KHz 5 55 340 A mV nS mA mA mA nS V V UGBW VOH VOL I Source = 2mA I Sink = 10uA Input Offset Voltage < 20mV 0 and 3.5 V Common Mode Voltage 0.1 100 3.8 VOS Common Mode Voltage = 1V -6.0 70 16 5.0 100 3.5 6.0 mV dB MHz V mV V nA 3000pF Load 2 Volt Level All Frequencies LX1673-03 Load = 3000pF LX1673-06 Load = 3000pF LX1673-09 Load = 3000pF 85 75 70 VCC VCCL,VC1 ICC ILDVCC VSS Static and Dynamic 6 1 0.792 0.784 -1 -1 0.8V 0.808 0.816 1 1 160 150 nS nS % % % 4.5 5.5 16 mA mA V V % V
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Symbol
Test Conditions
Min
LX1673 Typ
Max
Units
TA=25C
0C TA 70C
Current Sense Delay TCSD Current Sense Comparator ICS Operating Current OUTPUT DRIVERS - N-CHANNEL MOSFETS Low Side Driver Operating Current High Side Driver Operating Current Drive Rise Time, Fall Time High Level Voltage Low Level Voltage OSCILLATOR IVCCL IVC1 TRF VDH VDL
ELECTRICALS ELECTRICALS
Copyright (c) 2004 Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 4
LX1673
TM (R)
High Frequency PWM Regulator
PRODUCTION DATA SHEET
ELECTRICAL CHARACTERISTICS (CONTINUED) Unless otherwise specified, the following specifications apply over the operating ambient temperature 0C TA 70C except where otherwise noted and the following test conditions: VCC = 5V, VCCL = 5V, VC1=12V, LDVCC = 12V, TDRV = BDRV = 3000pF Load. Parameter
UVLO AND SOFT-START (SS) Start-Up Threshold (VC1, VCCL, LDVCC) Start-Up Threshold (VCC) Hysteresis VCC SS Input Resistance SS Shutdown Threshold Hiccup Mode Duty Cycle LINEAR REGULATOR CONTROLLER Voltage Reference Tolerance Source Current Sink Current DISABLE INPUTS PWM Disable LDO Disable POWER GOOD Drain to Source Voltage Leakage Note 1: Note 2: Note 3: I = 3mA 0.4 0.05 V A DIS LDDIS Threshold Internal Pull down Resistance Threshold Internal Pull down Resistance 1 80 2.5 100 V IHDRV ILDRV VLDFB = .8V, COUT = 330F VOUT = 10V VOUT = 0.4V 30 0.2 2 % mA mA RSS VSHDN CSS = 0.1F 4.0 4.0 4.25 0.1 20 0.1 10 4.5 V V V
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Symbol
Test Condition
Min
LX1673 Typ
Max
Units
K
V %
K
V
K
System Specification Low duty cycle pulse testing techniques are used which maintain junction and case temperatures equal to the ambient temperature Functionality over the -40 to 85 deg C operating temperature range is assured by design, characterization, and statistical process control
E ELECTRICALS
Copyright (c) 2004 Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 5
LX1673
TM (R)
High Frequency PWM Regulator
PRODUCTION DATA SHEET
BLOCK DIAGRAM
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RSET CS
CS Comp IRESET
ISET
Vin (5V)
PWM
+ VS VTRIP
ISET
R S
Q Q
VC1
CIN
TDRV EAO
L1
V out 1 ESR COUT
BDRV PGND +5V
Comp
+ EA+ Amplifier/ Compensation VREF 20k EA+ Ramp Oscillator
UVLO
Hiccup
VCCL
-
+5V UVLO VCC
F
FAULT S
R S
S
LDVCC TEMP 5.5V
SS1
SS DIS CSS PWGD
Figure 1 - Block Diagram of PWM Phase
+V +12V
LDGD
VREF
LDVCC
16V
BLOCK DIAGRAM BLOCK DIAGRAM
+ -
VOUT 2
LDFB
+5V
LDDIS
Figure 2 - LDO Controller Block Diagram
Copyright (c) 2004 Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 6
LX1673
TM (R)
High Frequency PWM Regulator
PRODUCTION DATA SHEET
APPLICATION SCHEMATIC
+5
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+5
PWRGD
+12
PWM Vout
+3.3
1
20
19
18
17
16 15
+5
LDVCC PWGD VC1 TDRV PGND LDGD BDRV VCCL 14
LDO Vout
2 LDFB 3 LDDIS 4 DGND 5 AGND DIS SS 7 EA+ 8 EA9 CS EAO 10 VS
+5
13 12 11
LX1673
VCC
LDDIS DIS
6
Figure 3 - Schematic with Bootstrap Supply for PWM High Side Drive
+5
+5
PWRGD
PWM Vout
PWM Vout
1
20
19
18
17
16 15
+5
LDVCC PWGD VC1 TDRV PGND LDGD BDRV VCCL 14
LDO Vout
2 LDFB 3 LDDIS 4 DGND 5 AGND DIS SS 7 EA+ 8 EA9 CS EAO 10 VS
+5
13 12 11
LX1673
VCC
APPLICATIONS APPLICATIONS
LDDIS DIS
6
Figure 4 - Schematic for 5 Volt only Input
Copyright (c) 2004 Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 7
LX1673
TM (R)
High Frequency PWM Regulator
PRODUCTION DATA SHEET
THEORY OF OPERATION GENERAL DESCRIPTION The LX1673 is a voltage-mode pulse-width modulation controller integrated circuit. The internal oscillator and ramp generator frequency is fixed to 300KHz, 600KHz, or 900KHz. The device has external compensation, for more flexibility of output current magnitude. UNDER VOLTAGE LOCKOUT (UVLO) At power up, the LX1673 monitors the supply voltage for VCC, VCCL, LDVCC and VC1 (there is no requirement for sequencing the supplies). Before all supplies reach their undervoltage lock-out (UVLO) thresholds, the soft-start (SS) pin is held low to prevent soft-start from beginning, the oscillator is disabled and all MOSFETs are held off. There is an internal delay that will filter out transients less that 1.5Sec. SOFT-START Once the supplies are above the UVLO threshold, the soft-start capacitor begins to be charged by the reference through a 20k internal resistor. The capacitor voltage at the SS pin rises as a simple RC circuit. The SS pin is connected to the error amplifier's non-inverting input that controls the output voltage. The output voltage will follow the SS pin voltage if sufficient charging current is provided to the output capacitor. The simple RC soft-start allows the output to rise faster at the beginning and slower at the end of the soft-start interval. Thus, the required charging current into the output capacitor is less at the end of the soft-start interval. A comparator monitors the SS pin voltage and indicates the end of soft-start when SS pin voltage reaches 95% of VREF. OVER-CURRENT PROTECTION (OCP) AND HICCUP The LX1673 uses the RDS(ON) of the upper MOSFET, together with a resistor (RSET) to set the actual current limit point. The current sense comparator senses the MOSFET current 350nS after the top MOSFET is switched on in order to reduce inaccuracies due to ringing. A current source supplies a current (ISET), whose magnitude is 50A. The set resistor RSET is selected to set the current limit for the application. RSET and VS should be connected directly at the upper MOSFET drain and source to get an accurate measurement across the low resistance RDS(ON). When the sensed voltage across RDS(ON) plus the set resistor exceeds the 300mV, VTRIP threshold, the OCP comparator outputs a signal to reset the PWM latch and to start hiccup mode. The soft-start capacitor (CSS) is discharged slowly (10 times slower than when being charged up by RSS). When the voltage on the SS pin reaches a 0.1V threshold, hiccup finishes and the circuit softstarts again. During hiccup both MOSFETs are held off. Hiccup is disabled during the soft-start interval, allowing the circuit to start up with maximum current. If the rate of rise of the output voltage is too fast, the required charging current to the output capacitor may be higher than the limit-current. In this case, the peak MOSFET current is regulated to the limit-current by the current-sense comparator. If the MOSFET current still reaches its limit after the soft-start finishes, the hiccup is triggered again. When the output has a short circuit the hiccup circuit ensures that the average heat generation in both MOSFETs and the average current is much less than in normal operation,. Over-current protection can also be implemented using a sense resistor, instead of using the RDS(ON) of the upper MOSFET, for greater set-point accuracy. OSCILLATOR FREQUENCY An internal oscillator sets the switching frequency at 300kHz, 600kHz, or 900kHz.
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APPLICATIONS APPLICATIONS
Copyright (c) 2004 Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 8
LX1673
TM (R)
High Frequency PWM Regulator
PRODUCTION DATA SHEET
APPLICATION NOTE OUTPUT INDUCTOR The output inductor should be selected to meet the requirements of the output voltage ripple in steady-state operation and the inductor current slew-rate during transient. The peak-topeak output voltage ripple is:
VRIPPLE = ESR x I RIPPLE where supply, the output capacitor is usually selected for ESR instead of capacitance or RMS current capability. A capacitor that satisfies the ESR requirements usually has a larger capacitance and current capability than strictly needed. The allowed ESR can be found by:
ESR x I RIPPLE + I < VEX Where IRIPPLE is the inductor ripple current, I is the maximum load current step change, and VEX is the allowed output voltage excursion in the transient. Electrolytic capacitors can be used for the output capacitor, but are less stable with age than tantalum capacitors. As they age, their ESR degrades, reducing the system performance and increasing the risk of failure. It is recommended that multiple parallel capacitors be used, so that, as ESR increase with age, overall performance will still meet the processor's requirements. There is frequently strong pressure to use the least expensive components possible; however, this could lead to degraded longterm reliability, especially in the case of filter capacitors. Microsemi's demonstration boards use the CDE Polymer AL-EL (ESRE) filter capacitors, which are aluminum electrolytic, and have demonstrated reliability. The OS-CON series from Sanyo generally provides the very best performance in terms of long term ESR stability and general reliability, but at a substantial cost penalty. The CDE Polymer AL-EL (ESRE) filter series provides excellent ESR performance at a reasonable cost. Beware of offbrand, very low-cost filter capacitors, which have been shown to degrade in both ESR and general electrolytic characteristics over time.
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(
)
I =
VIN - VOUT L
x
D fs
I is the inductor ripple current, L is the output inductor value and ESR is the Effective Series Resistance of the output capacitor. I should typically be in the range of 20% to 40% of the maximum output current. Higher inductance results in lower output voltage ripple, allowing slightly higher ESR to satisfy the transient specification. Higher inductance also slows the inductor current slew rate in response to the load-current step change, I, resulting in more output-capacitor voltage droop. When using electrolytic capacitors, the capacitor voltage droop is usually negligible, due to the large capacitance The inductor-current rise and fall times are:
TRISE = Lx
and
I
(V
IN
- VOUT
)
INPUT CAPACITOR
TFALL = Lx
.
I VOUT
The inductance value can be calculated by
The input capacitor and the input inductor, if used, are to filter the pulsating current generated by the buck converter to reduce interference to other circuits connected to the same 5V rail. In addition, the input capacitor provides local de-coupling for the buck converter. The capacitor should be rated to handle the RMS current requirements. The RMS current is: I RMS = I L d(1 - d) Where IL is the inductor current and d is the duty cycle. The maximum value occurs when d = 50%, then IRMS =0.5IL. For a 5V input and output voltages in the range of 2 to 3V, the required RMS current is very close to 0.5IL.
L=
VIN - VOUT I
x
D fs
APPLICATIONS APPLICATIONS
OUTPUT CAPACITOR
The output capacitor is sized to meet ripple and transient performance specifications. Effective Series Resistance (ESR) is a critical parameter. When a step load current occurs, the output voltage will have a step that equals the product of the ESR and the current step, I. In an advanced microprocessor power
SOFT-START CAPACITOR
The value of the soft-start capacitor determines how fast the output voltage rises and how large the inductor current is required to charge the output capacitor. The output voltage will follow the voltage at the SS pin if the required inductor current does not exceed the maximum allowable current for the inductor.
Copyright (c) 2004 Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 9
LX1673
TM (R)
High Frequency PWM Regulator
PRODUCTION DATA SHEET
APPLICATION NOTE (CONTINUED)
The SS pin voltage can be expressed as:
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VSS = V ref 1 - e
(
- t/R SSCSS
)
Where RSS and CSS are the soft-start resistor and capacitor. The current required to charge the output capacitor during the soft start interval is.
current limit set point. If the upper MOSFET on time is less than 350nS and a short circuit condition occurs the duty cycle will increase, since VOUT will be forced low. The current limit circuit will be enabled when the upper gate drive exceeds 350nS although the actual peak current limit value will be higher than calculated with the above equation. Short circuit protection still exists due to the narrow pulse width even though the magnitude of the current pulses will be higher than the calculated value. If OCP is not desired connect both VSX and VCX to VCC. Do not leave them floating.
dVss Iout = Cout dt Taking the derivative with respect to time results in
Iout =
and at t=0
VrefCout - t/R SS C SS e RssCss
VrefCout RssCss
OUTPUT DISABLE
The LX1673 PWM MOSFET driver outputs are shut off by pulling the disable (DIS) pin above 1.2V. There is a 80K pull down resistor on this input. The LDO voltage regulator has its own Disable pin (LDDIS) for control of this output voltage. Pulling this pin above 3 V disables the LDO. There is a 100K pull down resistor on this input.
Im ax =
The required inductor current for the output capacitor to follow the soft start voltage equals the required capacitor current plus the load current. The soft-start capacitor should be selected to provide the desired power on sequencing and insure that the overall inductor current does not exceed its maximum allowable rating. Values of CSS equal to 0.1f or greater are unlikely to result in saturation of the output inductor unless very large output capacitors are used.
PROGRAMMING THE OUTPUT VOLTAGE
The output Voltage is sensed by the feedback pin (FBX) which is compared to a 0.8V reference. The output voltage can be set to any voltage above 0.8V (and lower than the input voltage) by means of a resistor divider (see Figure 1). VOUT = VREF (1 + R 1 /R 2 ) Note: This equation is simplified and does not account for error amplifier input current. Keep R1 and R2 close to 1K (order of magnitude).
OVER-CURRENT PROTECTION
Current limiting occurs at current level ICL when the voltage detected by the current sense comparator is greater than the current sense comparator threshold, VTRIP (300mV).
DDR VTT TERMINATION VOLTAGE
Double Data Rate (DDR) SDRAM requires a termination voltage (VTT) in addition to the line driver supply voltage (VDDQ) and receiver supply voltage (VDD). VTT for DDR memory can be generated with the LX1673 by using the positive input of the phase 2 error amplifier RF2 as a reference input from an external reference voltage VREF which is defined as one half of VDDQ. Using VREF as the reference input will insure that all voltages are correct and track each other as specified in the JEDEC (EIA/JESD8-9A) specification. The phase 2 output will then be equal to VREF and track the VDDQ supply as required. When an external reference is used the connection between the error amplifier positive input and the Soft Start pin is lost and Soft Start will not function. It is recommended that the external reference voltage have an R-C time constant that will be long enough to allow the output capacitor to charge slowly. See Microsemi Application Note 17 for more details
I CL x R DS(ON) + I SET x R SET = VTRIP
So,
R SET =
VTRIP - I CL x R DS(ON) I SET
=
300 mV - I CL x R DS(ON) 50 A
Example: For 10A current limit, using FDS6670A MOSFET ( 10m RDS(ON)):
R SET = 0.3 - 10 x 0.010 50 x 10- 6 = 4K
APPLICATIONS APPLICATIONS
Note: Maximum RSET is 6K . Any resistor 6K or greater will not allow startup since ICL will equal zero (50A x 6K = 300mV). At higher PWM frequencies or low duty cycles where the upper gate drive is less than 350nS wide the 350nS delay for current limit enable may result in current pulses exceeding the desired
Copyright (c) 2004 Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 10
LX1673
TM (R)
High Frequency PWM Regulator
PRODUCTION DATA SHEET
APPLICATION NOTE CONSIDERATIONS
1. The minimum RSET resistor value is 1k ohm for the current limit sensing. If this resistor becomes shorted, it will do permanent damage to the IC. 2. A resistor has been put in series with the gate of the LDO pass transistor to reduce the output noise level. The resistor value can be changed to optimize the output transient response versus output noise. 3. To delay the turn on of the LDO controller output, a capacitor should be connected between the LDDIS pin and the +5volts. The LDDIS input has a 100K pull down resistor, which keeps the LDO active until this pin is pulled high. During the power up sequence the capacitor connected to the LDDIS pin will keep the LDO off until this capacitor, being charge by the 100K pull down resistor, goes through the low input threshold level. 4. . If current limit is not used connect the VS and VC pins together and to VCC. Do not leave them floating. A floating VS pin will result in operation resembling a hiccup condition.
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APPLICATIONS APPLICATIONS
Copyright (c) 2004 Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 11
LX1673
TM (R)
High Frequency PWM Regulator
PRODUCTION DATA SHEET
PACKAGE DIMENSIONS
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LQ
20-Pin Micro Leadframe Package (MLPQ) Package
MILLIMETERS MIN MAX 0.80 1.00 0 0.05 0.25 REF 0.23 0.38 5.00 BSC 1.25 3.25 5.00 BSC 1.25 3.25 0.65 BSC 0.35 0.75 INCHES MIN MAX 0.031 0.039 0 0.002 0.010 0.009 0.015 0.197 0.050 0.128 0.197 0.050 0.128 0.026 0.014 0.030
D
b L
Dim A A1 A3 b D D2 E E2 e L
E
D2
E2 e A1 A3 A
Note:
Dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm(0.006") on any side. Lead dimension shall not include solder coverage.
PW
20-Pin Thin Small Shrink Outline (TSSOP)
Dim
E
321
E1
e D A2 A
SEATING PLANE
1 L c
b
A1
A A1 A2 b c D E E1 e L 1 *LC
MILLIMETERS MIN MAX 1.10 0.05 0.15 0.80 1.05 0.19 0.30 0.09 0.20 6.40 6.60 6.25 6.55 4.30 4.50 0.65 BSC 0.45 0.75 0 8 0.10
INCHES MIN MAX 0.043 0.002 0.006 0.031 0.041 0.007 0.012 0.004 0.008 0.252 0.260 0.246 0.258 0.169 0.177 0.026 BSC 0.018 0.030 0 8 0.004
MECHANICALS MECHANICALS
solder coverage.
Copyright (c) 2004 Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 12
LX1673
TM (R)
High Frequency PWM Regulator
PRODUCTION DATA SHEET
NOTES
WWW .Microsemi .C OM
NOTES NOTES
PRODUCTION DATA - Information contained in this document is proprietary to Microsemi and is current as of publication date. This document may not be modified in any way without the express written consent of Microsemi. Product processing does not necessarily include testing of all parameters. Microsemi reserves the right to change the configuration and performance of the product and to discontinue product at any time.
Copyright (c) 2004 Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 13

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